1. Field of the Invention
The present invention relates to a voltage-controlled variable-capacitance device including a plurality of varactors, and more particularly relates to a voltage-controlled variable-capacitance device in which the correlation between applied voltage and capacitance can be selected.
2. Description of the Related Art
The oscillation frequency of a known voltage-controlled oscillator (VCO) is controlled using a voltage-controlled variable-capacitance device. The voltage-controlled variable-capacitance device generally includes a metal oxide semiconductor (MOS) varactor.
FIG. 1 is a sectional view of a known voltage-controlled variable-capacitance device. This known voltage-controlled variable-capacitance device is disposed in a semiconductor integrated circuit and includes a MOS varactor. Referring to FIG. 1, the voltage-controlled variable-capacitance device includes a P-type substrate 1 and an N well 2 disposed in the surface of the P-type substrate 1. The N well 2 is formed when an N well of a P-channel metal oxide semiconductor field effect transistor (MOSFET) is formed in the semiconductor integrated circuit provided with the varactor.
A gate insulator 6 is disposed on the N well 2. An N-type polysilicon layer 11 is disposed on the gate insulator 6 and is connected to a gate terminal 7. The gate insulator 6 is formed at the same time as a gate insulator of an N-channel MOSFET. The N-channel polysilicon layer 11 is formed at the same time as a gate electrode of the N-channel MOSFET.
N+ diffusion layers 3 are disposed at two positions on the surface of the N well 2. When viewed from a direction perpendicular to the surface of the P-type substrate 1 (hereinafter simply referred to as the perpendicular direction), the N+ diffusion layers 3 are separated from each other by the N-type polysilicon layer 11. The N+ diffusion layers 3 are formed at the same time as the source and drain of the N-channel MOSFET. The N+ diffusion layers 3 are connected to an SD terminal 8. Accordingly, the varactor includes the N well 2, the N+ diffusion layers 3, the gate insulator 6, and the N-type polysilicon layer 11.
In this known voltage-controlled variable-capacitance device, a change in voltage applied between the gate terminal 7 and the SD terminal 8 causes a change in capacitance between the N well 2 and the N-type polysilicon layer 11. Specifically, when a positive potential is applied to the gate terminal 7 whereas a negative potential is applied to the SD terminal 8, thereby having a sufficiently high voltage between the gate terminal 7 and the SD terminal 8, the varactor enters an accumulation mode in which the capacitance of the varactor becomes approximately equal to the capacitance of the gate insulator 6, that is, the maximum capacitance. When the potential applied to the gate terminal 7 is changed toward a negative potential, a depletion layer is formed immediately below the N-type polysilicon layer 11 of the N well 2. As this depletion layer expands, the capacitance of the varactor becomes smaller. When the potential of the gate terminal 7 is sufficiently low, the expansion of the depletion layer saturates. As a result, the reduction of the capacitance stops, and the capacitance reaches a minimum.
As described above, the voltage-controlled variable-capacitance device including the varactor is formed at the same time as the N-channel and P-channel MOSFETs of the semiconductor integrated circuit. The voltage-controlled variable-capacitance device is advantageous in that it can be formed without modifying the process of manufacturing the semiconductor integrated circuit or performing an additional process.
However, this known voltage-controlled variable-capacitance device has the following problems. Since the MOS varactor is formed at the same time as the MOSFETs by the MOSFET manufacturing process, the characteristics of the MOS varactor are determined by the manufacturing conditions of the MOSFETs. To use this varactor to control the oscillation frequency of the VCO, it is preferable that the voltage dependence of the capacitance between the gate and the substrate, that is, the high-frequency C-V characteristics, be optimized in accordance with the circuit, such as the VCO including this voltage-controlled variable-capacitance device. For example, when the curve indicating the correlation between the voltage and the capacitance (C-V curve) is too steep, it becomes difficult to control the oscillation frequency of the VCO.
To only change the high-frequency C-V characteristics of the voltage-controlled variable-capacitance device, for example, a method of changing the impurity concentration in the N well 2 shown in FIG. 1 is known. FIG. 2 is a graph showing the high-frequency C-V characteristics, wherein the abscissa represents the gate-SD voltage and the ordinate represents the gate-SD capacitance, when the impurity concentration in the N well 2 (see FIG. 1) is changed within the range 1×1017 to 1×1018 cm−3. FIG. 2 demonstrates that an increase in the impurity concentration in the N well 2 causes the C-V curve to move in the direction indicated by the arrow 31.
As described above, an increase in the impurity concentration in the N well changes the high-frequency C-V characteristics of the varactor, that is, smoothes the C-V curve. To optimize the impurity concentration in the N well, a special step of introducing an impurity to the N well is necessary. Therefore, the varactor cannot be manufactured at the same time as the N well of the P-channel MOSFET. Alternatively, the process of manufacturing the P-channel MOSFET must be modified, resulting in a change in the characteristics of the P-channel MOSFET. Referring again to FIG. 2, a change in the impurity concentration in the N well induces a change in the expansion of the depletion layer, thereby changing the minimum capacitance. The minimum capacitance of the voltage-controlled variable-capacitance device determines the upper limit of the oscillation frequency of the VCO, and the maximum capacitance of the voltage-controlled variable-capacitance device determines the lower limit of the oscillation frequency of the VCO. A change in the minimum capacitance of the voltage-controlled variable-capacitance device is undesirable since such a change may result in a change in the range of the oscillation frequency of the VCO.
To only change the characteristics of the voltage-controlled variable-capacitance device, a method of changing the material of the gate insulator or the thickness of the gate insulator or a method of changing the shape of the gate electrode has been proposed. As in the previous method of changing the impurity concentration in the N well, these methods require an additional special process or modification of the manufacturing conditions of the MOSFET. These methods are thus unrealistic.
A technique has been disclosed for setting the rate of change of capacitance to an arbitrary value by generating a plurality of voltages by voltage drop means and applying these plural voltages to a plurality of varactors (e.g., Japanese Unexamined Patent Application Publication No. 2002-43842).
This known technique has the following problems. Since the technique requires the voltage drop means, the circuit structure becomes more complicated and larger. Also, since this circuit does not operate unless a sufficiently high control voltage is applied, this circuit is capable of only limited voltage reduction in the semiconductor integrated circuit.